In recent years, electrostatic discharge (ESD) has become an increasingly critical factor in the yield and reliability of MOS-type integrated circuits. Specifically, ESD has been known to result in the destruction of MOS devices to the inputs and/or outputs of the completed integrated circuit of which the MOS device is a component. In reaction, numerous protection circuits have been developed by circuit designers to solve the problem of damage to MOS devices caused by ESD. Some of these protection circuits have been somewhat effective in protecting input and output MOS devices during an ESD transient. However, the problem of ESD has not yet been effectively addressed in regard to protecting MOS devices during early stages of manufacturing or processing of MOS-type integrated circuits, i.e., prior to completion of the MOS-type integrated circuit.
As a specific example, protection against ESD damage is particularly important for today's MOS transistors which utilize very thin gate oxides and shallow source/drain junctions. For instance, present day MOS transistor gate oxides can have a thickness of approximately 100 Angstroms or less, and source/drain junctions of 2000 Angstroms or less. Such very thin gate oxides and shallow source/drain junctions are highly vulnerable to being damaged by ESD. By way of example, some dry etching techniques implemented during manufacturing, such as reactive ion etching or plasma etching, can create electrostatic charge on a gate which exceeds the dielectric field strength of the gate oxide, thereby causing breakdown of the gate oxide and destruction of the MOS transistor. See, for example, "Dielectric Breakdown of Gate Insulator Due to Reactive Ion Etching", by T. Watanabe and Y. Yoshida, Solid State Technology, April, 1984, pp. 263-266. Generally, the dielectric field strength of a 100 Angstrom gate oxide is approximately 10 MV/cm, and electrostatic charge of 10 V would exceed this dielectric field strength so as to cause breakdown of the gate oxide.
Thus, there remains a need for protection against damage to MOS-type devices, such as, MOS transistors, caused by ESD. Such protection is more particularly required during the manufacturing of integrated circuits having MOS devices integrated therein.